AC TRANSCONDUCTANCE METHOD

To probe interface, border and oxide traps, conventional methods suffer from several limitations when used on modern transistors with small gate size, and/or non-silicon channel material, such as lacking substrate contacts, low signal-to-noise ratio due to small device area, and missing models for slow traps.

The ac transconductance method I developed during my PhD overcomes these limitations by focusing on ac signals from the channel current instead of those difficult-to-access signals used by conventional methods.   The method analyze border/oxide traps from frequency dispersion of ac transconductance method, which are common in transistors with defective gate interface and oxides:

X. Sun et al IEEE Transaction on Device and Material Reliability

From a to f: The ac G_m of various FETs : (a) planar Si NMOSFET with high quality HfO₂ (b) In_0.53Ga_0.47As NMOSFET with Al₂O₃ (IMEC) (c) InGaAs NMOSFET with Al₂O₃/HfO₂ fabricated for RF test (after S. Johnanson, Lund U. IEEE T-ED 2012) (d) Ge NMOSFET with GeS_x/Al₂O₃/HfO₂ (IMEC IEDM 2012) (e) Ge PMOSFET with Si passivation and HfO₂ (IMEC IEDM 2012) and (f) In_0.65Ga_0.35As nanowire NMOSFET with small gate area (L down to 20 nm, W_eq=60-70 nm× 4 wires, Purdue)

Extracted trap distribution in a HfO2/AlGaN/GaN MOS-HEMT (high electron mobility transistor) under different annealing temperatures

X. Sun et al Applied Physics Letters, 2013

 TEM indicates that the poly-crystallization during 600C annealing could be the culprit